Marcus Brazil's Home Page

      I am a Senior Lecturer in the
      Department of Electical and Electronic Engineering
      The University of Melbourne,
      Parkville, Vic 3010, Australia.

      E-mail: brazil@unimelb.edu.au

      Phone: +61 3 8344 3829
      Fax: +61 3 8344 6678


      I can be found in Room 5.11


      Research - Network Design and Optimisation

      I work as part of an active and exciting research group lead by myself, Prof. Doreen Thomas and Dr Jia Weng, based in the Department of Electrical and Electronic Engineering, at The University of Melbourne. We are particularly interested in the theoretical, computational and practical aspects of designing minimum cost networks for interconnecting given sets of nodes. This is a difficult but fascinating problem, with many important applications, and we are internationally recognised as leading researchers in this area.

      We are looking for post-graduate students who are enthusiastic and are strong either in Mathematics or Computer Science. We offer not only the chance to work on an interesting project, but also the opportunity to be part of CUBIN, a Research Centre on Broadband Networks containing a large community of lecturers, research fellows and other post-grad students.

      My Areas of Research Interest, all of which are available as possible post-graduate research topics include:

      • Properties of Steiner Minimum Trees
      • Minimum Orientation-Constrained Networks in Microchips
      • Minimum three-dimensional Steiner networks
      • Efficient Algorithms for Multicast Routing
      • Ant-Colony Algorithms in Network Routing and Design

      Personal Research Links

      • A short biography
      • My Complete List of Publications with selected abstracts and pdf files.
      • My official home page in EEEng


      Other Links

      • My Links page.


      Created: 12/01/2000
      Last modified: 6/12/2001
      Maintained and Authorised by: Marcus Brazil

      Disclaimer: The content of this home page is completely unofficial, and in no way represents the views of the Department of Electrical and Electronic Engineering or the University of Melbourne. These institutions are not to be held responsible for anything contained herein. However, in the interests of academic freedom they have linked this page to the Department's Home Page.
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